NB2308A Datasheet - ON Semiconductor

NB2308A Zero Delay Clock Buffer

Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name REF (Note 3) CLKA1 (Note 4) CLKA2 (Note 4) VDD GND CLKB1 (Note 4) CLKB2 (Note 4) S2 (Note 5) S1 (Note 5) CLKB3 (Note 4) CLKB4 (Note 4) GND VDD CLKA3 (Note 4) CLKA4 (Note 4) FBK Description Input reference frequency, 5 V tolerant input. Buffered c.

www.DataSheet4U.com NB2308A 3.3 V Zero Delay Clock Buffer The NB2308A is a versatile, 3.3 V zero delay buffer designed to distribute high speed clocks. It is available in a 16 pin package. The part has an on chip PLL which locks to an input clock presented on the REF pin. The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs. The input to output propagation delay is guaranteed to be less than 250 ps, and the output <.

NB2308A Features

* http://onsemi.com MARKING DIAGRAMS

* 16 1 SOIC

* 16 D SUFFIX CASE 751B 1 XXXXXXXXXG AWLYWW 16 16 16 1 TSSOP

* 16 DT SUFFIX CASE 948F 1 XXXX XXXX ALYWG G XXXX = Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb

* Free Package (Note: Mic

NB2308A_ONSemiconductor.pdf