NB6N11S Datasheet, Buffer/translator, ON Semiconductor

✔ NB6N11S Features

Maximum Input Clock Frequency > 2.0 GHz
Maximum Input Data Rate > 2.5 Gb/s
1 ps Maximum of RMS Clock Jitter
Typically 10 ps of Data Dependent Jitter
380 ps Typi

✔ NB6N11S Application

The NB6N11S has a wide input common mode range from GND + 50 mV to VCC
50 mV. Combined with the 50 W inte

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NB6N11S

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📄 Datasheet

Description:

Input to lvds fanout buffer/translator. The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS.

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NB6N11SMNGEVB

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NB6N11S Input LVDS Fanout Buffer Translator ON Semiconductor