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NB6N11S - Input to LVDS Fanout Buffer/Translator

The NB6N11S by ON Semiconductor is a Input to LVDS Fanout Buffer/Translator. Below is the official datasheet preview.

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Official preview page of the NB6N11S Input to LVDS Fanout Buffer/Translator datasheet (ON Semiconductor).

NB6N11S Product details

Description

The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS.These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively.As such, the NB6N11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications.The NB6N11S has a wide input common mode range from GND + 50 mV to VCC 50 mV.

Features

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