NB6N239S

3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT Clock Divider

ON Semiconductor

NB6N239S Features

* Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with B1)

* Input Compatibility with LVDS/LVPECL/CML/HSTL/HCSL

* Rise/Fall Time 120 ps Typical

* < 5 ps Typical Within Device Output Skew

* Example; 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz Outputs

NB6N239S General Description

The NB6N239S is a high *speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16. Both divider circuits drive LVDS compatible outputs. (More device information on page 7). The NB6N239S is a member of the ECLinPS MAX™ family of.

NB6N239S Datasheet (143.87 KB)