PI6LC48S25A Datasheet (Pericom Semiconductor) - Ethernet Network Clock Generator

PI6LC48S25A, Ethernet Network Clock Generator

The PI6LC48S25A is an LC VCO based low phase noise design intended for 10GbE applications.

Typical 10GbE usage assumes a 25MHz crystal input, while the PLL loop is used to generate the 156.25MHz and other Ethernet clock frequencies.

An additional buffered crystal oscillator output is provided to ser

PI6LC48S25A Features

* ÎÎ3.3V & 2.5V supply voltage ÎÎCrystal/CMOS input: 25 MHz ÎÎDifferential input: 25MHz, 125MHz, and 156.25 MHz ÎÎOutput frequencies: 312.5, 156.25, 125, 100, 50, 25MHz ÎÎ4 Output banks with selectable output signaling: LVPECL or LVDS ÎÎLow 0.3ps typical integrated phase noise design: 156.25MHz (12kHz