EL4584 Datasheet (Renesas) - Horizontal Genlock

EL4584, Horizontal Genlock

EL4584 Horizontal Genlock, 4FSC The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz.

In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to it.

The reference signal is a horizontal sync signal, TTL/CMOS format, which can be easily derived from an analog composite video signal with the EL4583 Sync Separator.

EL4584 Features

* 36MHz, general purpose PLL

* 4FSC based timing (use the EL4585 for 8FSC)

* Compatible with EL4583 sync separator

* VCXO, Xtal, or LC tank oscillator

* < 2ns jitter (VCXO)

* User controlled PLL capture and lock

* Compatible with NTSC and PAL T