EL4585 Datasheet (Renesas) - Horizontal Genlock

EL4585, Horizontal Genlock

EL4585 Horizontal Genlock, 8FSC The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz.

In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to it.

The reference signal is a horizontal sync signal, TTL/CMOS format, which can be easily derived from an analog composite video signal with the EL4583 sync separator.

EL4585 Features

* 36MHz, general purpose PLL

* 8FSC timing (use the EL4584 for 4FSC)

* Compatible with EL4583 sync separator

* VCXO, Xtal, or LC tank oscillator

* < 2ns jitter (VCXO)

* User-controlled PLL capture and lock

* Compatible with NTSC and PAL TV form