ICS854S296I-33 - LVDS Programmable Delay-Line

Product Overview

Renesas

Part number	ICS854S296I-33
Manufacturer	Renesas
File Size	420.46 KB
Description	LVDS Programmable Delay-Line
Datasheet	ICS854S296I-33 Datasheet
Additional preview pages of the ICS854S296I-33 datasheet.

The ICS854S296I-33 is a high performance LVDS Programmable Delay Line.

One LVDS level output.
One differential clock input pair.
Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML.
Maximum frequency: 1.2GHz.
Programmable Delay Range: 2.2ns to 12.5ns in 10ps steps.
D[9:0] can accept LVPECL, LVCMOS or LVTTL levels.
Full 3.3V supply voltages.
-40°C to 85°C ambient operating temperature.
Available in lead-free (RoHS 6) package ICS854S296DKI-33.

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Published: Oct 28, 2021 |