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IDTF1951 Digital Step Attenuator

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Description

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This document describes the specification for the F1951 Digital Step Attenuator.

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Features

* Glitch-FreeTM, < 0.6 dB transient overshoot
* Spurious Free Design
* 3 V to 5.25 V supply
* Attenuation Error < 0.2 dB @ 2 GHz
* Low Insertion Loss < 1.2 dB @ 2 GHz
* Excellent Linearity +65 dBm IP3I
* Fast settling time, < 450 ns
* Class 2 JEDEC ESD (> 2kV HBM)

Applications

* The silicon design has very low insertion loss and low distortion (+65 dBm IP3I. ). The device has pinpoint accuracy and settles to final attenuation value within 400 nsec. Most importantly, the F1951 includes Renesas’ Glitch-FreeTM technology which results in less than 0.6 dB of overshoot ringing d

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