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ISL23325 Datasheet - Renesas

ISL23325 Low Voltage Digitally Controlled Potentiometer

TSSOP 1 2 µTQFN 6, 15 16 3 1 4 2 5 3 6 4 7 5 8 8 9 9 10 10 11 11 12 12 13 13 14 14 7 SYMBOL DESCRIPTION GND VLOGIC Ground pin I2C bus/logic supply. Range 1.2V to 5.5V SDA Logic Pin - Serial bus data input/open drain output SCL Logic Pin - Serial bus clock input A0 .

DATASHEET ISL23325 Dual, 256-Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™) FN7870 Rev 1.00 September 23, 2015 The ISL23325 is a volatile, low voltage, low noise, low power, 256-Tap, dual digitally controlled potentiometer (DCP) with an I2C Bus™ interface. It integrates two DCP cores, wiper switches and control logic on a monolithic CMOS integrated circuit. Each digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The positi.

ISL23325 Features

* Two potentiometers per package

* 256 resistor taps

* 10kΩ 50kΩ or 100kΩ total resistance

* I2C serial interface - No additional level translator for low bus supply - Three address pins allow up to eight devices per bus

* Maximum supply current without serial

ISL23325 Datasheet (1.10 MB)