M6MGB321S4TP Features
* DINOR (Divided bit-line NOR) architecture for the memory cell. Access Time Flash 85ns (Max.) 4M-bit SRAM is a 524,288 bytes / 262,144 words SRAM 85ns (Max.) asynchronous SRAM fabricated by silicon-gate CMOS technology. Supply Voltage VCC=2.7 ~ 3.6V The M6MGB/T321S4TP is a Stacked micro Multi Chip Pa
Datasheet Details
M6MGB321S4TP, M6MGT321S4TP
92.80 KB
Cmos sram.
This datasheet PDF includes multiple part numbers: M6MGB321S4TP, M6MGT321S4TP.
Please refer to the document for exact specifications by model.
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M6MGB321S4TP Distributor
