KM416S1020C Datasheet (Samsung Semiconductor)

KM416S1020C, 1M x 16 SDRAM

The KM416S1020C is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock c

KM416S1020C CMOS SDRAM 1M x 16 SDRAM 512K x 16bit x 2 Banks Synchronous DRAM LVTTL Revision 0.6 September 1998 Samsung Electronics reserves the right to change products or specification without notice.

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0.6 (Sep.

1998) www.DataSheet4U.com KM416S1020C Revision History Revision 0.6 (September 10, 1998) CMOS SDRAM Removed KM416S1020C-H/L product (-H: 100MHz @ CL=2, -L: 100MHz @ CL3 ) Changed the clock cycle time of

KM416S1020C Features

* 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs -. CAS Latency ( 2 & 3) -. Burst Length (1, 2, 4, 8 & full page) -. Burst Type (Sequential & Interleave) All inputs are sampled at the positive