KM416S1021C Datasheet - Samsung Semiconductor

KM416S1021C 512K x 16-Bit x 2-Bank SDRAM

The KM416S1021C is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock c.

KM416S1021C Features

* JEDEC standard 3.3V power supply

* SSTL_3 (Class II) compatible with multiplexed address

* Dual banks operation

* MRS cycle with address key programs - CAS latency (2 & 3) - Burst length (1, 2, 4, 8 & Full page) - Burst type (Sequential & Interleave)

* All i

KM416S1021C_SamsungSemiconductor.pdf