K4S561632E-TL75 Datasheet (Samsung semiconductor) - 256Mb E-die SDRAM Specification

K4S561632E-TL75, 256Mb E-die SDRAM Specification

The K4S560432E / K4S560832E / K4S561632E is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 / 4 x 8,392,608 / 4 x 4,196,304 words by 4bits, fabricated with SAMSUNG's high performance CMOS technology.

Synchronous design allows precise cycle control with the use of

SDRAM 256Mb E-die (x4, x8, x16) CMOS SDRAM 256Mb E-die SDRAM Specification Revision 1.3 September.

2003 Samsung Electronics reserves the right to change products or specification without notice.

Rev.

1.3 September.

2003 SDRAM 256Mb E-die (x4, x8, x16) Revision History Revision 1.0 (May.

2003) - First release.

Revision 1.1 (June.

2003) - Correct Typo Revision 1.2 (June.

2003) - Added 166MHz speed bin in x16 Revision 1.3 (September.

2003) - Corrected typo in ordering information.

CMOS

K4S561632E-TL75 Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)

* All inputs are