K4S640832F Datasheet (Samsung semiconductor) - 64Mbit SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM LVTTL

K4S640832F, 64Mbit SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM LVTTL

The K4S640832F is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock c

K4S640832F CMOS SDRAM 64Mbit SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM LVTTL Revision 1.1 May.

2003 Samsung Electronics reserves the right to change products or specification without notice.

Rev.1.1 May.

2003 K4S640832F Revision History Revision 0.0 (June, 2001) Revision 0.1 (Sep., 2001) CMOS SDRAM Changed the Notes in Operating AC Parameter.

< Before > 5.

For 1H/1L, tRDL=1CLK and tDAL=1CLK+tRP is also supported .

SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.

< After

K4S640832F Features

* JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled a