K4D263238A Datasheet - Samsung

K4D263238A 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM

K4D263238A-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL (144-Ball FBGA) Revision 2.0 January 2003 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev. 2.0 (Jan. 2003) K4D263238A-GC Revision History Revision 2.0 (January 16, 2002) Changed package ball height from 0.25mm to 0.35mm Typo corrected 128M DDR SDRAM Revision 1.9 (July 18, 200.

K4D263238A Features

* 2.5V + 5% power supply for device operation

* 2.5V + 5% power supply for I/O interface

* SSTL_2 compatible inputs/outputs

* 4 banks operation

* MRS cycle with address key programs -. Read latency 3,4,5 (clock) -. Burst length (2, 4, 8 and Full page) -. Burst

K4D263238A_Samsungsemiconductor.pdf