LC89975M Datasheet - Sanyo

LC89975M PAL-Format Delay Line

Ordering number : EN 5391 NMOS + CCD LC89975M PAL-Format Delay Line Preliminary Overview The LC89975M is a lower-cost PAL-Format CCD delay line based on the LC89970M, with the sizes of chip and package miniaturized and the external parts count reduced. Auto-bias circuit Sync tip clamping circuit (luminance signal) Center bias circuit (chrominance signal) Sample-and-hold circuit PLL 3× circuit 3 fsc clock output circu.

LC89975M Features

* 5 V single-voltage power supply

* On-chip 3× PLL circuit for 3

* fsc operation from an fsc (4.43 MHz) input

* Supports PAL/GBI and 4.43 NTSC systems, selected by a control pin input

* Includes an on-chip comb filter for chrominance signal crosstalk exclusion. This

LC89975M Datasheet (98.25 KB)