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Si53307 - Ultra-Low Additive Jitter Fanout Clock Buffers

This page provides the datasheet information for the Si53307, a member of the Si53301 Ultra-Low Additive Jitter Fanout Clock Buffers family.

Datasheet Summary

Description

Input Input MUX Output Glitch- LOS less Output Switch1 OE Option Synchro- Clk Dividnous OE1 er Option Si53301-B-GM 6 output universal buffer Yes 2 6 Diff / 12 Yes with 2:1 input mux SE Yes Per Bank Yes Per Bank Si53302-B-GM 10 output universal buffer Yes 2 10 Diff / 20 Yes with 2:1

Features

  • include independent (synchronous) output enable, glitchless switching, LOS monitor of input clocks, output clock division, and built-in format translation. These buffers can be paired with the Si534x clocks and jitter attenuators, the Si5332 clocks, and the Si5xx oscillators to deliver end-to-end clock tree performance. KEY.

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Datasheet preview – Si53307

Datasheet Details

Part number Si53307
Manufacturer Skyworks
File Size 1.12 MB
Description Ultra-Low Additive Jitter Fanout Clock Buffers
Datasheet download datasheet Si53307 Datasheet
Additional preview pages of the Si53307 datasheet.

📁 Similar Datasheet

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Other Datasheets by Skyworks
  • Si53301 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si53302 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si53303 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si53304 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si53305 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si53306 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si53308 - Ultra-Low Additive Jitter Fanout Clock Buffers
  • Si5332 - Any-Frequency Clock Generator

Full PDF Text Transcription

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Si5330x Data Sheet Ultra-Low Additive Jitter Fanout Clock Buffers with up to 10 Universal Outputs from Any-Format Input and Wide Frequency Range from 1 MHz to 725 MHz The Si5330x family of Universal/Any-format fanout buffers is ideal for clock distribution (1 MHz minimum) and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range. Built-in LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments. The Si5330x family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux.
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