TH58TEG8DCJTAK0 Datasheet - Toshiba

TH58TEG8DCJTAK0 NAND memory Toggle DDR1.0

Toggle DDR is a NAND interface for high performance applications which support data read and write operations using bidirectional DQS. Toggle DDR NAND has implemented ’Double Data Rate’ without a clock. It is compatible with functions and command which have been supported in conventional type NAND(i.

TH58TEG8DCJTAK0 Features

* Organization Table 1 Product Organization Parameter Part number (TOPER: 0~70℃) Part number (TOPER: -40~85℃) Device capacity Page size Block size Plane size Plane per one LUN LUN per one target Target per one device Number of valid blocks per a device (min) Number of valid blocks per a device (max)

TH58TEG8DCJTAK0 Datasheet (247.93 KB)