TH58NVG1S3AFT05 Datasheet - Toshiba Semiconductor

TH58NVG1S3AFT05 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

The TH58NVG1S3A is a single 3.3-V 2G-bit (2,214,592,512 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048+64) bytes x 64 pages x 2048 blocks. The device has a 2112-byte static registers which allow program and read data to be transferred between the .

TH58NVG1S3AFT05 Features

* x Organization Memory cell allay 2112 u 64K u 8 u 2 Register 2112 u 8 Page size 2112bytes Block size (128K 4K) bytes x Modes ReadResetAuto Page Program Auto Block EraseStatus Read x Mode control Serial inputoutput Command control x Powersupply x Program/Erase Cycles x Access time Cell array

TH58NVG1S3AFT05_ToshibaSemiconductor.pdf