WCSS0418V1P - 256K x 18 Synchronous-Pipelined Cache RAM

Datasheet Details

Part number	WCSS0418V1P
Manufacturer	Weida Semiconductor
File Size	707.55 KB
Description	256K x 18 Synchronous-Pipelined Cache RAM
Datasheet	WCSS0418V1P_WeidaSemiconductor.pdf

The WCSS0418V1P is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic.

Supports 100-MHz bus for Pentium and PowerPC™ operations with zero wait states.
Fully registered inputs and outputs for pipelined operation.
256K by 18 common I/O architecture.
3.3V core power supply.
2.5V / 3.3V I/O operation.
Fast clock-to-output times www. DataSheet4U. com.
3.5 ns (for 166-MHz device).
4.0 ns (for 133-MHz device).
5.5 ns (for 100-MHz dev.

📁 WCSS0418V1P Similar Datasheet

Other Datasheets by Weida Semiconductor

Published: Nov 15, 2008 |