A3S56D30ETP, A3S56D40ETP Datasheet - Zentel

A3S56D30ETP, A3S56D40ETP, (A3S56D30ETP / A3S56D40ETP) 256Mb DDR SDRAM

A3S56D30ETP A3S56D40ETP www.DataSheet4U.com 256M Double Data Rate Synchronous DRAM 256Mb DDR SDRAM Specification A3S56D30ETP A3S56D40ETP Zentel Ele.
A3S56D30ETP is a 4-bank x 8,388,608-word x 8bit, A3S56D40ETP is a 4-bank x 4,194,304-word x 16bit double data rate synchronous DRAM , with SSTL_2 inte.

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A3S56D40ETP_Zentel.pdf

A3S56D30ETP Datasheet Preview — This datasheet PDF includes multiple part numbers: A3S56D30ETP, A3S56D40ETP. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

A3S56D30ETP, A3S56D40ETP

Manufacturer:

Zentel

File Size:

952.32 KB

Description:

(A3S56D30ETP / A3S56D40ETP) 256Mb DDR SDRAM

Note:

This datasheet PDF includes multiple part numbers: A3S56D30ETP, A3S56D40ETP.
Please refer to the document for exact specifications by model.

Features

* - Vdd=Vddq=2.5V+0.2V (-5E, -5, -6) - Double data rate architecture ; two data transfers per clock cycle. - Bidirectional , data strobe (DQS) is transmitted/received with data - Differential clock input (CLK and /CLK) - DLL aligns DQ and DQS transitions with CLK transitions edges of DQS - Commands en

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A3S56D40ETP A3S56D30ETP A3S56D40ETP 256Mb DDR SDRAM Zentel

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