A3S12D30ETP - 512Mb DDR SDRAM

Product Overview

Powerchip

Datasheet Details

Part number	A3S12D30ETP
Manufacturer	Powerchip
File Size	2.10 MB
Description	512Mb DDR SDRAM
Datasheet	A3S12D30ETP Datasheet
Additional preview pages of the A3S12D30ETP datasheet.

Product details

Description

A3S12D30ETP is a 4-bank x 16,777,216-word x 8-bit, A3S12D40ETP is a 4-bank x 8,388,608-word x 16-bit, double data rate synchronous DRAM, with SSTL_2 interface.

Features

- Vdd=Vddq=2.5V+0.2V (for speed grade -6, 7.5) - Vdd=Vddq=2.6V+0.1V (for speed grade -5) - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock inputs (CLK and /CLK) - DLL aligns DQ and DQS transitions with CLK transitions edges of DQS - Commands entered on each positive CLK edge; - data and data mask referenced to both edges of DQS - Four internal banks for concurrent opertation - 4 bank opera.

📁 Similar Datasheet

A3S28D30FTP - 128M Double Data Rate Synchronous DRAM (Zentel)
A3S28D40FTP - 128M Double Data Rate Synchronous DRAM (Zentel)
A3S28D40JTP - 128M Double Data Rate Synchronous DRAM (Zentel)
A3S56D30ETP - (A3S56D30ETP / A3S56D40ETP) 256Mb DDR SDRAM (Zentel)
A3S56D30FTP - 256M Double Data Rate Synchronous DRAM (Zentel)
A3S56D30GTP - 256M Double Data Rate Synchronous DRAM (Zentel)
A3S56D40ETP - (A3S56D30ETP / A3S56D40ETP) 256Mb DDR SDRAM (Zentel)
A3S56D40FTP - 256M Double Data Rate Synchronous DRAM (Zentel)

Other Datasheets by Powerchip

A3S12D40ETP - 512Mb DDR SDRAM

Published: Feb 4, 2014 |