A3S56D30GTP Datasheet - Zentel

A3S56D30GTP, 256M Double Data Rate Synchronous DRAM

A3S56D30GTP A3S56D40GTP 256M Double Data Rate Synchronous DRAM 256Mb DDR SDRAM Specification A3S56D30GTP A3S56D40GTP Zentel Electronics Corp.Revisi.
A3S56D30GTP is a 4-bank x 8,388,608-word x 8bit, A3S56D40GTP is a 4-bank x 4,194,304-word x 16bit double data rate synchronous DRAM , with SSTL_2 inte.

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Datasheet Details

Part number:

A3S56D30GTP

Manufacturer:

Zentel

File Size:

1.55 MB

Description:

256M Double Data Rate Synchronous DRAM

Features

* - VDD=VDDQ=2.5V+0.2V - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock input (CLK and /CLK) - DLL aligns DQ and DQS transitions with CLK transitions edges of DQS - Commands entered on each pos

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A3S56D30GTP 256M Double Data Rate Synchronous DRAM Zentel

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