74SSTUB32865 28-BIT TO 56-BIT REGISTERED BUFFER

Texas Instruments

Description

74SSTUB32865 www.ti.com SLAS537 * NOVEMBER 2007 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST .
This 28-bit 1:2 configurable registered buffer is designed for 1.

📥 Download Datasheet

74SSTUB32865 Datasheet Preview — Preview of 74SSTUB32865 PDF

Datasheet Specifications

Part number: 74SSTUB32865
Manufacturer: Texas Instruments ↗
File Size: 743.75 KB
Datasheet: 74SSTUB32865-etcTI.pdf
Description: 28-BIT TO 56-BIT REGISTERED BUFFER

Features

* 1
* 2 Member of the Texas Instruments Widebus+™ Family
* Pinout Optimizes DDR2 RDIMM PCB Layout
* 1-to-2 Outputs Supports Stacked DDR2 RDIMMs
* Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption
* Output Edge-Con

Applications

* of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus+ is a trademark of Texas Instruments. 2 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standar

74SSTUB32865 Distributors

📁 Related Datasheet

74S00 74S04 74S08 74S08N 74S10 74S112

📌 All Tags

74SSTUB32865 28-BIT 56-BIT REGISTERED BUFFER Texas Instruments

Texas Instruments 74SSTUB32865-like datasheet