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74SSTUB32868A 28-Bit to 56-Bit Registered Buffer

74SSTUB32868A Description

74SSTUB32868A www.ti.com SCAS846C * JULY 2007 * REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATU.
This 28-bit 1:2 configurable registered buffer is designed for 1.

74SSTUB32868A Features

* 1
* 23 Member of the Texas Instruments Widebus+™ Family
* Pinout Optimizes DDR2 DIMM PCB Layout
* 1-to-2 Outputs Support Stacked DDR2 DIMMs
* One Device Per DIMM Required
* Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power

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28-Bit 56-Bit Registered Buffer Texas Instruments
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