74SSTUB32868 Datasheet - Texas Instruments

74SSTUB32868 28-Bit to 56-Bit Registered Buffer

This 28-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation. One device per DIMM is required to drive up to 18 SDRAM loads or two devices per DIMM are required to drive up to 36 SDRAM loads. All inputs are SSTL_18, except the chip-select gate-enable (CSGEN), control (.

74SSTUB32868 Features

* 1

* 2 Member of the Texas Instruments Widebus+ ™Family

* Pinout Optimizes DDR2 DIMM PCB Layout

* 1-to-2 Outputs Supports Stacked DDR2 DIMMs

* One Device Per DIMM Required

* Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power

74SSTUB32868-etcTI.pdf