* 1 1:2 Differential Buffer
* Single Clock Input
* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
* Two LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 33 mA
* Very Low Additive Jitter:
CDCLVP1102 Datasheet (1.33 MB)
CDCLVP1102
1.33 MB
High-performance clock buffer.
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CDCLVP1102
SCAS884D
* AUGUST 2009
* REVISED .
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