CDCLVP1102 Datasheet - Texas Instruments

CDCLVP1102 High-Performance Clock Buffer

The CDCLVP1102 is a highly versatile, low additive jitter buffer that can generate two copies of LVPECL clock outputs from one LVPECL, LVDS, or LVCMOS input for a variety of communication applications. It has a maximum clock frequency up to 2 GHz. The overall additive jitter performance is less than.

CDCLVP1102 Features

* 1 1:2 Differential Buffer

* Single Clock Input

* Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL

* Two LVPECL Outputs

* Maximum Clock Frequency: 2 GHz

* Maximum Core Current Consumption: 33 mA

* Very Low Additive Jitter:

CDCLVP1102-etcTI.pdf