* 1 2:8 Differential Buffer
* Selectable Clock Inputs Through Control terminal
* Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
* Eight LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 73 mA
* Very Low
CDCLVP1208 Datasheet (1.35 MB)
CDCLVP1208
1.35 MB
High-performance clock 2:8 buffer.
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CDCLVP1208
SCAS890E
* OCTOBER 2009
* REVISED.
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