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CDCLVP1204 High-Performance Clock Buffer

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Description

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design CDCLVP1204 SCAS880F * AUGUST 2009 .
The CDCLVP1204 is a highly versatile, low additive jitter buffer that can generate four copies of LVPECL clock outputs from one of two selectable LVPE.

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Features

* 1 2:4 Differential Buffer
* Selectable Clock Inputs Through Control Terminal
* Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
* Four LVPECL Outputs
* Maximum Clock Frequency: 2 GHz
* Maximum Core Current Consumption: 45 mA
* Very Low A

Applications

* Wireless Communications
* Telecommunications/Networking
* Medical Imaging

CDCLVP1204 Distributors

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