LMK1D1212 Datasheet - Texas Instruments

LMK1D1212 Low Additive Jitter LVDS Buffer

The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can.

LMK1D1212 Features

* High-performance LVDS clock buffer family: up to 2 GHz

* 2:12 differential buffer (LMK1D1212)

* 2:16 differential buffer (LMK1D1216)

* Supply voltage: 1.71 V to 3.465 V

* Low additive jitter: < 60 fs RMS maximum in 12- kHz to 20-MHz at 156.25 MHz

* V

LMK1D1212-etcTI.pdf