Description
LMK1D1212, LMK1D1216 SNAS823A * OCTOBER 2021 * REVISED APRIL 2023 LMK1D121x Low Additive Jitter LVDS Buffer 1 .
The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs.
Features
* High-performance LVDS clock buffer family: up to 2 GHz
* 2:12 differential buffer (LMK1D1212)
* 2:16 differential buffer (LMK1D1216)
* Supply voltage: 1.71 V to 3.465 V
* Low additive jitter: < 60 fs RMS maximum in 12-
kHz to 20-MHz at 156.25 MHz
* V
Applications
* Telecommunications and networking
* Medical imaging
* Test and measurement
* Wireless infrastructure
