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LMK5B12204 Ultra-Low Jitter Network Synchronizer Clock

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Description

www.ti.com LMK5B12204 SNAS810A * MAY 2020 * REVISEDLMJAKNU5ABR1Y22200241 SNAS810A * MAY 2020 * REVISED JANUARY 2021 .
The LMK5B12204 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and.

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Features

* One Digital Phase-Locked Loop (DPLL) With:
* Hitless Switching: ±50-ps Phase Transient
* Programmable Loop Bandwidth With Fastlock
* Standards-Compliant Synchronization and Holdover Using a Low-Cost TCXO/OCXO
* Two Analog Phase-Locked Loops (APLLs) With Indu

Applications

* SyncE (G.8262), SONET/SDH (Stratum 3/3E, G.813, GR-1244, GR-253), IEEE 1588 PTP Slave Clock, or Optical Transport Network (G.709)
* 400G Line Cards, Fabric Cards for Ethernet Switches and Routers
* Wireless Base Station (BTS), Wireless Backhaul
* Test and Measureme

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