ASM5I9772A Datasheet PDF (12-Output Zero Delay Buffer) | Download Alliance Semiconductor ASM5I9772A

ASM5I9772A - 12-Output Zero Delay Buffer

Description

The ASM5I9772A is a low-voltage high-performance 200 MHz PLL-based zero delay buffer, designed for highspeed clock-distribution applications.

Features

Output frequency range: 8.33 MHz to 200 MHz Input frequency range: 6.25 MHz to 125 MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs ±2% max Output duty cycle variation 12 clock outputs: drive up to 24 clock lines One feedback output Three reference clock inputs: crystal or LVCMOS 300pS max output-output skew Phase-locked loop (PLL) bypass mode ‘SpreadTrak’ Output enable/disable Pin-compatible with CY29772, MPC9.

Datasheet Details

Part number	ASM5I9772A
Manufacturer	Alliance Semiconductor
File Size	621.31 KB
Description	12-Output Zero Delay Buffer
Datasheet	ASM5I9772A Datasheet
Additional preview pages of the ASM5I9772A datasheet.

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Full PDF Text Transcription

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June 2005 rev 0.3 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer Features Output frequency range: 8.33 MHz to 200 MHz Input frequency range: 6.25 MHz to 125 MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs ±2% max Output duty cycle variation 12 clock outputs: drive up to 24 clock lines One feedback output Three reference clock inputs: crystal or LVCMOS 300pS max output-output skew Phase-locked loop (PLL) bypass mode ‘SpreadTrak’ Output enable/disable Pin-compatible with CY29772, MPC9772 and MPC972 Industrial temperature range: –40°C to +85°C 52 pin 1.0 mm TQFP package ASM5I9772A The ASM5I9772A features one on-chip crystal oscillator and two LVCMOS reference clock inputs and provides 12 outputs partitioned in three banks of four outputs each.

Published: May 9, 2008 |