ASM5I9774A Datasheet 12-Output Zero Delay Buffer

Manufacturer: Alliance Semiconductor

Datasheet Details

The ASM5I9774A is a low-voltage high-performance 125MHz PLL-based zero delay buffer designed for highspeed clock distribution applications.

When PLL_EN is LOW, PLL is bypassed and the reference clock directly feeds the output dividers.

This mode is fully static and the minimum input clock frequency specification does not apply.

June 2005 rev 0.3 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay.

Output frequency range: 8.3MHz to 125MHz Input frequency range: 4.2MHz to 62.5MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs 14 Clock outputs: Drive up to 28 clock lines 2 LVCMOS reference clock inputs 150 pS max output-output skew PLL bypass mode ‘SpreadTrak’ Output enable/disable Pin compatible with MPC9774 and CY29774AI. Industrial temperature range:.
40°C to +85°C 52Pin 1.0mm TQFP package RoHS Compliance ASM.

Part Number	Description
ASM5I9772A	12-Output Zero Delay Buffer
ASM5I9773A	12-Output Zero Delay Buffer
ASM5I9775A	14-Output Zero Delay Buffer
ASM5I9350	3.3V 1:10 LVCMOS PLL Clock Generator
ASM5I9351	9-Output Zero Delay Buffer
ASM5I9352	11-Output Zero Delay Buffer
ASM5I961C	Low Voltage Zero Delay Buffer
ASM5I961P	Low Voltage Zero Delay Buffer
ASM5I9653A	3.3V 1:8 LVCMOS PLL Clock Generator
ASM5I9658	3.3V 1:10 LVCMOS PLL Clock Generator