ASM5I9774A Overview
The ASM5I9774A is a low-voltage high-performance 125MHz PLL-based zero delay buffer designed for highspeed clock distribution applications. When PLL_EN is LOW, PLL is bypassed and the reference clock directly feeds the output dividers. This mode is fully static and the minimum input clock frequency specification does not apply.
ASM5I9774A Key Features
- 1 Feedback clock output