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June 2005 rev 0.3
2.5V or 3.3V, 200-MHz, 14 Output Zero Delay Buffer
General Features
Output frequency range: 8.3MHz to 200MHz Input frequency range: 4.2MHz to 125MHz 2.5V or 3.3V operation Split 2.5V/3.3V outputs 14 Clock outputs: Drive up to 28 clock lines 2 LVCMOS reference clock inputs 150 pS max output-output skew PLL bypass mode ‘SpreadTrak’ Output enable/disable Industrial temperature range: –40°C to +85°C 52 Pin 1.0 mm TQFP Package RoHS Compliance
ASM5I9775A
14 outputs partitioned in 3 banks of 5, 5, and 4 outputs. Bank A and Bank B divide the VCO output by 4 or 8 while Bank C divides by 8 or 12 per SEL(A:C) settings, see Functional Table. These dividers allow output to input ratios of 6:1, 4:1, 3:1, 2:1, 3:2, 4:3, 1:1, and 2:3.
ASM5I9775A Datasheet
