AS4DDR32M16 - 8 Meg x 16 x 4 Banks Double Data Rate SDRAM COTS

Description

The 512Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits.

It is internally configured as a quad-bank DRAM.

The 512Mb DDR SDRAM uses a double data rate architecture to achieve high-speed operation.

Features

VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V.
Bidirectional data strobe (DQS) transmitted/received with data, i. e. , source-synchronous data capture (has two.
one per byte).
Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle.
Differential clock inputs (CK and CK#).
Commands entered on each positive CK edge.
DQS edge-aligned with data for READs; center-aligned with data for WRITEs.
DLL to alig.

Austin Semiconductor

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Datasheet Details

Part number	AS4DDR32M16
Manufacturer	Austin Semiconductor
File Size	7.57 MB
Description	8 Meg x 16 x 4 Banks Double Data Rate SDRAM COTS
Datasheet	AS4DDR32M16 Datasheet
Additional preview pages of the AS4DDR32M16 datasheet.

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Full PDF Text Transcription

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Austin Semiconductor, Inc. 8 Meg x 16 x 4 Banks Double Data Rate SDRAM COTS, Plastic Encapsulated Microcircuit FEATURES • VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • Bidirectional data strobe (DQS) transmitted/received with data, i.e.

Published: Sep 26, 2009 |