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AS4DDR32M72PBG1 - 32Mx72 DDR SDRAM iNTEGRATED Plastic Encapsulated Microcircuit

Description

BGA Location B5,B6,N10,V6,V7 C4,C5,M10,U9,U10 C2,C3,M9,U7,U8 B3,B4,N11,V8,V9 B7,C8,N2,U2,V3 B8,B9,N4,V4,V5 C9,C10,N1U3,U4 C6,C7M4,U5,U6 D1,D2,M8,T8,T9 D10,D11M3,T1,T2 D3,D4M7,T10,T11 J4,L4,L2,K3,K9,L10, L8,J8,L9,J9,K2,K10, J2 L3, J3 H1,H3,J10,M11 D5,D6,D7,D8,D9,E1,E2, E3,E4,E5,E6,E7,E8,E9, E10,E11,F

Features

  • DDR SDRAM Data Rate = 200, 250, 266, 333Mbps.
  • Package:.

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Datasheet Details

Part number AS4DDR32M72PBG1
Manufacturer Austin Semiconductor
File Size 376.46 KB
Description 32Mx72 DDR SDRAM iNTEGRATED Plastic Encapsulated Microcircuit
Datasheet download datasheet AS4DDR32M72PBG1 Datasheet
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Full PDF Text Transcription

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i PEM 2.4G b SDRAM-DDR 2.4Gb Austin Semiconductor, Inc. AS4DDR32M72PBG1 32Mx72 DDR SDRAM iNTEGRATED Plastic Encapsulated Microcircuit FEATURES „ DDR SDRAM Data Rate = 200, 250, 266, 333Mbps „ Package: BENEFITS „ 40 - 70% SPACE SAVINGS „ Reduced part count „ Reduced I/O count • „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ „ 208 Plastic Ball Grid Array (PBGA), 16 x 23mm-1.0mm pitch 2.5V ±0.2V core power supply 2.5V I/O (SSTL_2 compatible) Differential clock inputs (CLK and CLK#) Commands entered on each positive CLK edge Internal pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle Programmable Burst length: 2,4 or 8 Bidirectional data strobe (DQS) transmitted/received with data, i.e.
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