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CEG8304
Dual P-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
-30V, -3.6A, RDS(ON) = 58mΩ @VGS = -10V. RDS(ON) = 85mΩ @VGS = -4.5V.
Super High dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TSSOP-8 for Surface Mount Package.
D1 1 S1 2 S1 3 G1 4
G2 S2 S2 D
TSSOP-8
G1 S1 S1 D
8 D2 7 S2 6 S2 5 G2
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage Gate-Source Voltage
VDS -30
VGS ±20
Drain Current-Continuous Drain Current-Pulsed a
ID -3.6 IDM -14
Maximum Power Dissipation
PD 1.
CEG8304 Datasheet
