CTL190NS10-T52 Datasheet | CT Micro

CTL190NS10-T52 N-Channel Enhancement MOSFET Features - Drain-Source Breakdown Voltage VDSS 100V - Drain-Source On-Resistance RDS(ON) 65m, at VGS= 10V, ID= 12A RDS(ON) 75m, at VGS= 5V, ID= 12A - Continuous Drain Current at TC=25℃ID =19A - Advanced high cell density Trench Technology - Ro HS pliance & Halogen Free Description The CTL190NS10-T52 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application. Applications - DC/DC Converter - Load Switch - LCD Display inverter Package Outline Schematic Drain Gate Source Drain Gate Source CT Micro Proprietary & Confidential Page 1 Rev 2 Jun, 2015 CTL190NS10-T52 N-Channel Enhancement...