CTL505NS10-T52 Overview
The CTL505NS10-T52 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application.
CTL505NS10-T52 Key Features
- Drain-Source Breakdown Voltage VDSS 100V
- Drain-Source On-Resistance
- Continuous Drain Current at TC=25℃ID =50.5A
- Advanced high cell density Trench Technology
- RoHS pliance & Halogen Free