CTLM17NS10-R3 Description
The CTLM17NS10-R3 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. The power dissipation is lim.
CTLM17NS10-R3 Key Features
- Drain-Source Breakdown Voltage VDSS 100 V
- Drain-Source On-Resistance
- Advanced high cell density Trench Technology
- RoHS pliance & Halogen Free