CY2DL1510 Datasheet PDF - Cypress Semiconductor 1:10 Differential LVDS Fanout Buffer Specs

CY2DL1510 - 1:10 Differential LVDS Fanout Buffer

Datasheet Summary

Description

The CY2DL1510 is an ultra-low noise, low-skew, low-propagation delay 1:10 differential LVDS fanout buffer targeted to meet the requirements of high-speed clock distribution applications.

Features

Low-voltage differential signal (LVDS) input with on-chip 100  input termination resistor.
Ten differential LVDS outputs.
40 ps maximum output-to-output skew.
600 ps maximum propagation delay.
0.11 ps maximum additive RMS phase jitter at 156.25 MHz (12 kHz to 20 MHz offset).
Up to 1.5 GHz operation.
Synchronous clock enable function.
32-pin thin quad flat pack (TQFP) package.
2.5 V or 3.3 V operating voltage [1].
Commercial and industrial opera.

Datasheet Details

Part number	CY2DL1510
Manufacturer	Cypress Semiconductor
File Size	301.61 KB
Description	1:10 Differential LVDS Fanout Buffer
Datasheet	CY2DL1510 Datasheet
Additional preview pages of the CY2DL1510 datasheet.

📁 Similar Datasheet

CY2DL1504 - 1:4 Differential LVDS Fanout Buffer (Cypress)

CY2DP1510 - 1:10 LVPECL Fanout Buffer (Cypress)

CY2DP814 - 1:4 Clock Fanout Buffer (Cypress)

CY20AAJ-8F - Nch IGBT for STROBE FLASHER (Powerex Power Semiconductors)

CY20AAJ-8H - N Channel IGBT (Renesas)

CY20APS - Quartz Crystal Low Profile HC49S Leaded Crystal (Crystek Corporation)

CY20APSMD - Quartz Crystal Surface Mount HC49S SMD Crystal (Crystek Corporation)

CY20AS - Quartz Crystal Low Profile HC49S Leaded Crystal (Crystek Corporation)

CY20ASMD - Quartz Crystal Surface Mount HC49S SMD Crystal (Crystek Corporation)

CY22392 - Automotive Flash Programmable Clock Generator (Cypress)

Full PDF Text Transcription

Click to expand full text

CY2DL1510 1:10 Differential LVDS Fanout Buffer 1:10 Differential LVDS Fanout Buffer Features ■ Low-voltage differential signal (LVDS) input with on-chip 100  input termination resistor ■ Ten differential LVDS outputs ■ 40 ps maximum output-to-output skew ■ 600 ps maximum propagation delay ■ 0.11 ps maximum additive RMS phase jitter at 156.25 MHz (12 kHz to 20 MHz offset) ■ Up to 1.5 GHz operation ■ Synchronous clock enable function ■ 32-pin thin quad flat pack (TQFP) package ■ 2.5 V or 3.3 V operating voltage [1] ■ Commercial and industrial operating temperature range Functional Description The CY2DL1510 is an ultra-low noise, low-skew, low-propagation delay 1:10 differential LVDS fanout buffer targeted to meet the requirements of high-speed clock distribution applications.

Published: Jul 30, 2011 |