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CY2DP1502 Datasheet 1:2 Lvpecl Fanout Buffer

Manufacturer: Cypress (now Infineon)

Overview: CY2DP1502 1:2 LVPECL Fanout Buffer 1:2 LVPECL Fanout Buffer.

General Description

The CY2DP1502 is an ultra-low noise, low-skew, low-propagation delay 1:2 LVPECL fanout buffer targeted to meet the requirements of high-speed clock distribution applications.

The device has a fully differential internal architecture that is optimized to achieve low additive jitter and low skew at operating frequencies of up to 1.5 GHz.

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Key Features

  • One differential (LVPECL, LVDS, HCSL, or CML) input pair distributed to two LVPECL output pairs.
  • Translates any single-ended input signal to 3.3 V LVPECL levels with resistor bias on INx# input.
  • 20-ps maximum output-to-output skew.
  • 480-ps maximum propagation delay.
  • 0.15-ps maximum additive RMS phase jitter at 156.25 MHz (12-kHz to 20-MHz offset).
  • Up to 1.5-GHz operation.
  • 8-pin SOIC or 8-pin TSSOP package.
  • 2.5-V or 3.3-V operating voltage [1].
  • Commerc.

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