CY2DP314 - 1 of 2:4 Differential Clock/Data Fanout Buffer

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY2DP314
Manufacturer	Cypress Semiconductor
File Size	213.69 KB
Description	1 of 2:4 Differential Clock/Data Fanout Buffer
Datasheet	CY2DP314 Datasheet
Additional preview pages of the CY2DP314 datasheet.

Product details

Description

The CY2DP314 is a low-skew, low propagation delay 2-to-4 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications.

Features

Four ECL/PECL differential outputs.
One ECL/PECL differential or single-ended inputs (CLKA).
One HSTL differential or single-ended inputs (CLKB).
Hot-swappable/-insertable.
50-ps output-to-output skew.
150-ps device-to-device skew.
400-ps propagation delay (typical).
0.8-ps RMS period jitter (max. ).
1.5-GHz operation (2.7-GHz maximum toggle frequency).
PECL and HSTL mode supply range: VCC = 2.5V± 5% to 3.3.

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Published: Nov 29, 2005 |