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CY2DL818
1:8 Clock Fanout Buffer
Features
• • • • • • • • • • • • • Low voltage operation VDD = 3.3V 1:8 fanout Single-input-configurable for LVDS, LVPECL, or LVTTL 8 pair of LVDS Outputs Drives either a 50-ohm or 100-ohm load (selectable) Low input capacitance Low output skew Low propagation delay Typical (tpd < 4 ns) Packages available include: TSSOP Does not exceed Bellcore 802.3 standards Operation at => 350 MHz – 700 Mbps
Description
This Cypress series of network circuits is produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic. The Cypress CY2DL818 fanout buffer features a single LVDS or a single-ended LVTTL-compatible input and eight LVDS output pairs.