CY7C1009D
Overview
- Pin- and function-compatible with CY7C109B/CY7C1009B
- High speed ❐ tAA = 10 ns
- Low active power ❐ ICC = 80 mA at 10 ns
- Low CMOS standby power ❐ ISB2 = 3 mA
- 2.0 V Data Retention
- Automatic power-down when deselected
- TTL-compatible inputs and outputs
- Easy memory expansion with CE1, CE2 and OE options
- CY7C109D available in Pb-free 32-pin 400-Mil wide Molded SOJ and 32-pin TSOP I packages. CY7C1009D available in Pb-free 32-pin 300-Mil wide Molded SOJ package Functional Description The CY7C109D/CY7C1009D [1] is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Output Enable Logic Block Diagram (OE), and tri-state eight input and output pins (I/O0 through I/O7) are placed in a high-impedance state when:
