Datasheet4U Logo Datasheet4U.com

CY7C1325H - 4-Mbit Flow-Through Sync SRAM

Description

The CY7C1325H is a 256K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic.

6.5 ns (133 MHz version).

Features

  • 256K × 18 common I/O.
  • 3.3 V core power supply (VDD).
  • 2.5 V or 3.3 V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 6.5 ns (133 MHz version).
  • Provide high performance 2-1-1-1 access rate.
  • User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchronous self timed write.
  • Asynchronous output enable.
  • Available in Pb-free 100-pin TQFP package.

📥 Download Datasheet

📁 Similar Datasheet

  • CY7C131AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C131E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C136AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C136E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C1370C - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
  • CY7C1370CV25 - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
  • CY7C1370D - 18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM (Cypress)
  • CY7C1371C - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture (Cypress)
  • CY7C1371S - 18-Mbit (512K x 36) Flow-Through SRAM (Cypress)
  • CY7C1372C - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
Other Datasheets by Cypress Semiconductor
  • CY7C1325 - 256K x 18 Synchronous 3.3V Cache RAM
  • CY7C1325G - 4-Mbit (256K 횞 18) Flow-Through Sync SRAM
  • CY7C132 - 2K x 8 Dual-Port Static RAM
  • CY7C1320AV18 - 18-Mbit DDR-II SRAM 2-Word Burst Architecture
  • CY7C1320BV18 - 18-Mbit DDR-II SRAM 2-Word Burst Architecture
  • CY7C1320CV18 - (CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture
  • CY7C1320JV18 - 18-Mbit DDR-II SRAM 2-Word Burst Architecture
  • CY7C1320KV18 - 18-Mbit DDR II SRAM Two-Word Burst Architecture

Full PDF Text Transcription

Click to expand full text
CY7C1325H 4-Mbit (256K × 18) Flow-Through Sync SRAM 4-Mbit (256K × 18) Flow-Through Sync SRAM Features ■ 256K × 18 common I/O ■ 3.3 V core power supply (VDD) ■ 2.5 V or 3.3 V I/O power supply (VDDQ) ■ Fast clock-to-output times ■ 6.5 ns (133 MHz version) ■ Provide high performance 2-1-1-1 access rate ■ User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self timed write ■ Asynchronous output enable ■ Available in Pb-free 100-pin TQFP package ■ “ZZ” sleep mode option Functional Description The CY7C1325H is a 256K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version).
Published: |