Datasheet Summary
4-Mbit (256K × 18) Pipelined SRAM with NoBL™ Architecture
4-Mbit (256K × 18) Pipelined SRAM with NoBL™ Architecture
Features
- Pin patible and functionally equivalent to ZBT™ devices
- Internally self-timed output buffer control to eliminate the need to use OE
- Byte write capability
- 256K × 18 mon I/O architecture
- 3.3 V core power supply (VDD)
- 2.5 V/3.3 V I/O power supply (VDDQ)
- Fast clock-to-output times
- 4.0 ns (for 133-MHz device)
- Clock enable (CEN) pin to suspend operation
- Synchronous self-timed writes
- Asynchronous output enable (OE)
- Available in Pb-free 100-pin TQFP package
- Burst capability
- linear or interleaved burst order
- ZZ sleep mode option...