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CY7C1471V33 Datasheet (cy7c147xv33) 72-mbit (2m X 36/4m X 18/1m X 72) Flow-through Sram

Manufacturer: Cypress (now Infineon)

Overview: .. CY7C1471V33 CY7C1473V33 CY7C1475V33 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL™.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

[1] The CY7C1471V33, CY7C1473V33 and CY7C1475V33 are 3.3V, 2M x 36/4M x 18/1M x 72 synchronous flow through burst SRAMs designed specifically to support unlimited true back-to-back read or write operations without the insertion of wait states.

The CY7C1471V33, CY7C1473V33 and CY7C1475V33 are equipped with the advanced No Bus Latency (NoBL) logic required to enable consecutive read or write operations with data being transferred on every clock cycle.

This

Key Features

  • No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.
  • Supports up to 133 MHz bus operations with zero wait states.
  • Data is transferred on every clock.
  • Pin compatible and functionally equivalent to ZBT™ devices.
  • Internally self timed output buffer control to eliminate the need to use OE.
  • Registered inputs for flow through operation.
  • Byte Write capability.
  • 3.3V/2.5V IO supply (VDDQ).

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1471V25 (CY7C147xV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM
CY7C1471BV25 72-Mbit (2 M x 36) Flow-Through SRAM
CY7C1471BV33 72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAM
CY7C147 4K x 1 STATIC RAM
CY7C1470BV25 (CY7C147xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM
CY7C1470BV33 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM
CY7C1470V25 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM
CY7C1470V33 (CY7C147xV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM
CY7C1472BV25 (CY7C147xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM
CY7C1472BV33 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM

CY7C1471V33 Distributor