CY7C136AE Datasheet

Cypress

CY7C136AE

Key Features

True dual-ported memory cells, which allow simultaneous reads of the same memory location
1K/2K × 8 organization
0.35 micron complementary metal oxide semiconductor (CMOS) for optimum speed and power
High speed access: 15 ns
Low operating power: ICC = 110 mA (typical), Standby: ISB3 = 0.05 mA (typical)
Fully asynchronous operation
Automatic power-down
BUSY output flag to indicate access to the same location by both ports
INT flag for port-to-port communication
Available in 52-pin plastic leaded chip carrier (PLCC), 52-pin plastic quad flat package (PQFP)

Part Number	Manufacturer	Description
CY7C1382D	Cypress	18-Mbit Pipelined SRAM
CY7C1383KV33	Cypress	18-Mbit Flow-Through SRAM
CY7C1380BV25	Cypress	512K x 36 / 1 Mb x 18 Pipelined SRAM
CY7C1382C	Cypress	18-Mb (512K x 36/1M x 18) Pipelined SRAM
CY7C135A	Cypress	4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM
CY7C1319KV18	Cypress	18-Mbit DDR II SRAM Four-Word Burst Architecture
CY7C1321KV18	Cypress	18-Mbit DDR II SRAM Four-Word Burst Architecture
CY7C1305BV25	Cypress	18-Mbit Burst of 4 Pipelined SRAM
CY7C1321BV18	Cypress	1.8V Synchronous Pipelined SRAM
CY7C1303BV25	Cypress	18-Mbit Burst of Two-Pipelined SRAM